Towards Uniform Modeling and Holistic Testing of Hardware and Software
| dc.contributor.author | Kılınççeker, Onur | |
| dc.contributor.author | Belli, Fevzi | |
| dc.coverage.doi | 10.1109/UBMYK48245.2019.8965650 | |
| dc.date.accessioned | 2020-07-18T03:35:15Z | |
| dc.date.available | 2020-07-18T03:35:15Z | |
| dc.date.issued | 2019 | |
| dc.description | 1st International Informatics and Software Engineering Conference, IISEC 2019 -- 6 November 2019 through 7 November 2019 | en_US |
| dc.description.abstract | This paper introduces an approach to uniform modeling and testing of hardware and software systems and their faults. As an example, for hardware under consideration, designs at a behavioral level will be used, implemented in Hardware Description Language (HDL). For software, an example will be borrowed from a graphical user interface design. Both examples will be modeled by finite state machines. The mutation of these models leads to lucid hardware and software fault models, respectively. Original models and their mutants will then be used to generate test cases for positive testing and negative testing, respectively, forming a holistic test strategy. A positive test is supposed to validate the system under legal (expected, regular) circumstances, whereas a negative test checks the behavior of the system under illegal (unexpected, irregular) situations. Non-trivial examples are used to validate and analyze the approach with respect to uniform modeling and testing capability. © 2019 IEEE. | en_US |
| dc.identifier.doi | 10.1109/UBMYK48245.2019.8965650 | en_US |
| dc.identifier.isbn | 9781728139920 | |
| dc.identifier.scopus | 2-s2.0-85079234053 | |
| dc.identifier.uri | https://doi.org/10.1109/UBMYK48245.2019.8965650 | |
| dc.identifier.uri | https://hdl.handle.net/11147/7839 | |
| dc.language.iso | en | en_US |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | en_US |
| dc.relation.ispartof | 1st International Informatics and Software Engineering Conference: Innovative Technologies for Digital Transformation, IISEC 2019 - Proceedings | en_US |
| dc.rights | info:eu-repo/semantics/openAccess | en_US |
| dc.subject | Finite state machine | en_US |
| dc.subject | Holistic testing | en_US |
| dc.subject | Mutation testing | en_US |
| dc.subject | Validation | en_US |
| dc.title | Towards Uniform Modeling and Holistic Testing of Hardware and Software | en_US |
| dc.type | Conference Object | en_US |
| dspace.entity.type | Publication | |
| gdc.author.institutional | Belli, Fevzi | |
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| gdc.coar.access | open access | |
| gdc.coar.type | text::conference output | |
| gdc.collaboration.industrial | false | |
| gdc.description.department | İzmir Institute of Technology. Computer Engineering | en_US |
| gdc.description.endpage | 6 | |
| gdc.description.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
| gdc.description.scopusquality | N/A | |
| gdc.description.startpage | 1 | |
| gdc.description.wosquality | N/A | |
| gdc.identifier.openalex | W3001569607 | |
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| gdc.oaire.keywords | System/Fault modeling | |
| gdc.oaire.keywords | Holistic Testing | |
| gdc.oaire.keywords | Mutation Testing | |
| gdc.oaire.keywords | Finite State Machine | |
| gdc.oaire.keywords | Validation | |
| gdc.oaire.keywords | Holistic testing | |
| gdc.oaire.keywords | System/Fault Modeling | |
| gdc.oaire.keywords | Mutation testing | |
| gdc.oaire.keywords | Finite state machine | |
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| gdc.oaire.sciencefields | 0202 electrical engineering, electronic engineering, information engineering | |
| gdc.oaire.sciencefields | 02 engineering and technology | |
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